1. Field of the Invention
The present invention relates generally to a programmable logic IC (integrated circuit) whose logic functions can be determined by the user, and more specifically to such a programmable logic IC which is provided with memories each for storing a plurality of different sets of configuration data, each of which is used to configure or reconfigure the logic IC. Still further, the present invention relates to a method of reconfigurating the programmable logic IC. The programmable logic IC is fabricated using a conventional LSI or VLSI (very large scale integration) technology,
2. Description of the Related Art
As is known in the art, a programmable logic IC (or device), such as an FPGA (field programmable gate array), a CPLD (complex programmable logic device), etc., is comprised of a plurality of logic elements which are two-dimensionally arranged. Logic operations, carried out by the programmable logic IC, are determined by logic functions of each logic element in combination with interconnections between the logic elements. The information for defining the logic operations of the programmable logic IC is referred to as configuration data. The configuration data, for example, includes a look-up table having two to six inputs for implementing a wide variety of logic functions. The look-up table is used to implement the logic operations of each logic element. Further, the configuration data includes data for determining on/off operations of switches of the logic elements, thereby to specify the interconnections between the logic elements. Each of the conventional logic elements is provided with a memory such as an SRAM (static random access memory), which is referred to as a configuration memory.
When it becomes necessary to reconfigure the programmable logic IC, a part or all of the data, already stored in the configuration memory, should be changed. This operation of data rewriting is called reconfiguration. In order to implement the reconfiguration, new programming data should be transferred to the configuration memory from an external non-volatile memory.
According to one known technique, reconfiguring the programmable logic IC is carried out in a manner similar to writing data into a RAM That is, the configuration memory is supplied, from a suitable external memory, with the addresses at which the new configuration data are to be written and also with the new configuration data itself. Therefore, the reconfiguration can be implemented by successively transferring "data words" each having a predetermined bit-length. By way of example, such a conventional reconfiguring technique is used with a device named XC6200 available at Xilinx, Corporation, as described in a reference manual entitled "XC6200 Field Programmable Gate Arrays" published Jun. 1, 1996 by that corporation.
A programmable logic IC has found extensive use in the case where the time period for circuit design is limited and the logic functions are changed depending on different applications. It is however a recent trend to positively use the ability of reconfiguring the programmable logic IC. Such a logic IC is referred to as a custom computer or a reconfigurable computer. The programmable logic IC, which is used as a custom computer, takes the advantage of dynamically reconfiguring the device's hardware (viz., the device's logic operations) so as to reconstruct the most desirable data processing hardware structure. It is expected that this type of custom computer can effectively be applied to technical fields such as data coding, encipherment and decipherment, etc., which are difficult to adequately be processed using the general architecture available in usual microprocessors.
The prior art has encountered the drawbacks that it takes too long to completely reconfigure the programmable logic IC. The reason for this is that the programmable logic IC is externally supplied with the new configuration data, In addition, it is difficult to achieve a sufficient data bandwidth so as to enable rapid transfer of the reconfiguration data. By way of example, the time, needed to reconfigure all the programmable logic IC, ranges between about 100 ms and about 100 .mu.s, which respectively correspond to a range between of 5-million cycles and 5-thousand cycles in the case where the programmable logic IC operates under a clock rate of 50 MHz. More specifically, assuming that the amount of the configuration data, needed to reconfigure a programmable logic IC, is 256 kbits. This corresponds to a programmable logic IC comprised of a plurality of logic elements, each of which has a configuration memory of 64-bit, and which are arranged in a matrix of 64.times.64. In this instance, if such a programmable logic IC is to be reconfigured using a 32-bit data bandwidth at a clock rate of 50 MHz, then the time interval needed to complete the reconfiguration of all the programmable logic IC becomes as long as 160 .mu.s.
As is known, when a programmable logic IC is used as a custom computer, it is necessary to frequently change (viz., reconfigure) the contents of each configuration memory of the programmable logic IC. The reconfiguration occurs each time the application program is changed, or even during the same application program. Accordingly, as mentioned above, if the reconfiguration time period is as long as more than 100 .mu.s, it is not practical to use such a conventional programmable logic IC as a custom computer in an environment where the reconfiguration is frequently necessary. More specifically, if the time period needed to complete the reconfiguration is about 100 .mu.s (for example), such usage of a programmable logic IC as a custom computer may be limited to the case where the reconfiguration occurs at a time interval ranging from 1 ms to 10 ms (for example).